SK hynix is developing a revolutionary “Multi-Site Cell” (MSC) technology that solves the historical trade-off between storage density and performance in NAND flash memory.
By essentially “splitting” a memory cell in half, they have found a way to move beyond current 4-bit (QLC) limits to 5-bit (PLC) and even 6-bit (HLC) storage without the typical loss in speed and reliability.
1. The “Split-Cell” Innovation (MSC)
Traditionally, to store more bits, you have to pack more voltage states into a single cell (e.g., 32 states for 5-bit PLC). This makes the cell slow and prone to errors. SK hynix’s new approach:
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Physical Split: It divides an elliptical 3D NAND cell into two independent halves (sites).
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Simplified States: Instead of 32 crowded voltage states in one cell, they use only 6 states per half-cell.
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Mathematical Multiplier: By combining the two halves ($6 \times 6 = 36$ possible combinations), they achieve more than the 32 states needed for 5-bit storage while keeping the internal voltage gaps wide and easy to read.
2. Massive Performance Gains
The most striking claim from the presentation is the performance recovery:
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20x Faster Reads: Compared to conventional 5-bit (PLC) methods, the MSC approach increases read speeds twentyfold.
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TLC-Level Reliability: The company suggests that even a 6-bit (HLC) cell using this method could match the endurance and speed of today’s 3-bit (TLC) cells—which are the current industry standard for high-performance SSDs.
3. Efficiency & Capacity
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25% More Capacity: Moving from QLC (4-bit) to PLC (5-bit) adds 25% more storage per die without needing more physical layers.
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Easier Scaling: Increasing bits-per-cell is often more cost-effective than adding more layers to the 3D stack, which involves increasingly difficult chemical and physical manufacturing steps.
4. Future Outlook
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Status: This was presented as research at the 2025 IEDM conference. While working wafers exist, it is not yet in mass production.
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Competitive Landscape: Major rivals like Samsung, Micron, and Kioxia will likely be forced to develop similar “split-cell” architectures to remain competitive in the ultra-high-density storage market.
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